Single Low-Power SerDes IP Cell Supports Wide Range of Protocols Spanning 1.25-6.4Gbps

“The SerDes requirements for ASICs and servers are increasingly demanding and cover many protocols,” said Steve Longoria, vice president for Semiconductor Solutions, IBM. “Rambus’ multi-protocol SerDes solution gives us a flexible, single IP solution that simplifies the design process without compromising performance, power or silicon die area.”

The Rambus multi-protocol SerDes is a single IP cell leveraging a scalable architecture that offers data rates of 1.25 Gbps to 6.4 Gbps. It features an advanced Rambus phase-locked loop (PLL) architecture, which achieves low jitter over a wide variety of operating data rates and enables best-in-class performance in a small silicon die area.

“Our customers are faced with design challenges that call for both high performance and low power in order to meet their application requirements,” said Sharon Holt, senior vice president of Worldwide Sales, Licensing and Marketing at Rambus. “IBM is renowned for its advanced technology, and we are pleased to provide our innovative multi-protocol SerDes for its ASIC library and product offerings.”

The Rambus SerDes solution also incorporates the Rambus LabStationâ„¢ characterization environment, enabling thorough qualification, advanced testability features, and improved time-to-market.